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Jan 26, 2026
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CMPE 125 - Digital Design 4 unit(s) Combinational and sequential logic theory and circuits with emphasis on mixed logic and algorithmic state machines. Digital system building blocks, data path and control units, system-level RTL design, Verilog/SystemVerilog HDL for design and verification, contemporary design flow and methodology. Lab component includes experiments using industry standard CAD tools and field programmable gate array (FPGA) devices.
Lecture 3 hours/lab 3 hours.
Prerequisite(s): CMPE 70 (with grade of “C-” or better). Computer Engineering or Software Engineering Majors Only. Grading: Letter Graded
Class Schedule | Syllabus Information | University Bookstore
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